FPGA Series, Part Three – Simulation
Part one and part two covered the logic of countbits, a simple VHDL module which accumulates set bits on an...
FPGA Series, Part Two – Count Bits
In part one of this series, I went over my AXI4 Lite logic, and gave some idea as to what...
FPGA Series, Part One – AXI Lite
Detailed analysis of VHDL to support AXI4 Lite
Ice Fishing Ski Sled Build
I love ice fishing, which shouldn’t be confused with, “I love catching fish.” That’s the goal, and it’s always a...
The Source
- Christmas Reflection – 2022
- Backpacking Trip 2022
- Data Mining and Plotting with Python: Part 3
- Data Mining and Plotting with Python: Part 2
- Data Mining and Plotting with Python: Part 1
- Essential Linux Commands
- The Journey
- 39.250263, -77.064818
- FPGA Series, Part Four – Character Device Driver
- FPGA Series, Part Three – Simulation